Reliability and yield: A joint defect-oriented approach

IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

Volumn , Issue , 2004, Pages 2-10

  Barsky, Roman ^a   Wagner, Israel A ^b  

^a TECHNION ISRAEL INSTITUTE OF TECHNOLOGY   (Israel)

^b IBM HAIFA RESEARCH LAB   (Israel)

Author keywords

[No Author keywords available]

Indexed keywords

PARAMETRIC DEFECTS; SOPT DEFECTS; UNIDIRECTIONAL CURRENT STRESS;

COMPUTER SIMULATION; ELECTRIC CONDUCTORS; ELECTRIC CURRENTS; ELECTROMIGRATION; FAULT TOLERANT COMPUTER SYSTEMS; PARAMETER ESTIMATION; RELIABILITY;

VLSI CIRCUITS;

EID: 24944523442     PISSN: 15505774     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DFTVS.2004.1347819     Document Type: Conference Paper

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