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Volumn 2, Issue , 2005, Pages 1814-1818
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Modeling-based design optimization of wafer-level and chip-scale packaging for RF-MEMS devices
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Author keywords
Chip scale; Modeling and simulation; Packaging; RF MEMS; Wafer level
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Indexed keywords
CHIP-SCALE PACKAGING;
HIGH RESISTIVITY SILICON;
LOW TEMPERATURE CO-FIRED CERAMICS (LTCC);
RF-MEMS SWITCHES;
CERAMIC MATERIALS;
COMPUTER SIMULATION;
ELECTRIC SWITCHES;
ENCAPSULATION;
MICROELECTROMECHANICAL DEVICES;
MICROWAVES;
SILICON;
SUBSTRATES;
WAVEGUIDES;
WSI CIRCUITS;
ELECTRONICS PACKAGING;
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EID: 24644497771
PISSN: 05695503
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (7)
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References (8)
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