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Volumn 9, Issue , 2004, Pages 230-234
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Tuning of electric artworks of printed circuit boards to reduce warpage
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Author keywords
[No Author keywords available]
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Indexed keywords
COPPER;
FINITE ELEMENT METHOD;
ITERATIVE METHODS;
OPTIMIZATION;
SEMICONDUCTOR DEVICE MODELS;
THERMAL EXPANSION;
TUNING;
ELECTRIC ARTWORKS;
FINITE ELEMENT (FE) MODELING;
ISOTHERMAL WARPAGE;
MINIATURIZED ELECTRONICS;
ORGANIC SUBSTRATES;
PRINTED CIRCUIT BOARDS;
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EID: 2442536991
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (5)
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References (9)
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