A Novel Systolic Array Structure for DCT

IEEE Transactions on Circuits and Systems II: Express Briefs

Volumn 52, Issue 7, 2005, Pages 366-369

  Cheng, Chao ^a   Parhi, Keshab K ^a  

^a University of Minnesota   (United States)

Author keywords

Discrete cosine transform (DCT); fast convolution; systolic array; very large scale integration (VLSI) implementation

Indexed keywords

ALGORITHMS; COSINE TRANSFORMS; MATRIX ALGEBRA; SYSTOLIC ARRAYS;

DISCRETE COSINE TRANSFORM (DCT); VLSI IMPLEMENTATION;

VLSI CIRCUITS;

EID: 24044544189     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2005.850432     Document Type: Article

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