Live sequence charts applied to hardware requirements specification and verification. A VCI bus interface model

International Journal on Software Tools for Technology Transfer

Volumn 7, Issue 4, 2005, Pages 341-350

  Bunker, Annette ^a,b   Gopalakrishnan, Ganesh ^a   Slind, Konrad ^a  

^a University of Utah   (United States)

^b Utah State University   (United States)

Author keywords

Formal verification; Live Sequence Charts; Protocol compliance; Specification; Virtual Component Interface Standard

Indexed keywords

EID: 23944440176     PISSN: 14332779     EISSN: None     Source Type: Journal    
DOI: 10.1007/s10009-004-0145-x     Document Type: Article

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