Using live sequence charts for hardware protocol specification and compliance verification

Proceedings - IEEE International High-Level Design Validation and Test Workshop, HLDVT

Volumn 2001-January, Issue , 2001, Pages 95-100

  Bunker, A ^a   Gopalakrishnan, G ^a  

^a University of Utah   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; FLOWCHARTING; HARDWARE; MICROPROCESSOR CHIPS; RECONFIGURABLE HARDWARE; SPECIFICATIONS; SYSTEM-ON-CHIP;

COMPLIANCE VERIFICATION; HIGH LEVEL DESCRIPTION; INTERFACE STANDARDS; LIVE SEQUENCE CHART; MULTIPLE VENDORS; PROTOCOL SPECIFICATIONS; SEMI-FORMAL VERIFICATIONS; SYSTEM ON CHIP DESIGN;

COMPLIANCE CONTROL;

EID: 84952778214     PISSN: 15526674     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HLDVT.2001.972814     Document Type: Conference Paper

References (12)

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