Investigation of silicon-on-insulator (SOI) substrate preparation using the smart-cutTM process

Nuclear Instruments and Methods in Physics Research, Section B: Beam Interactions with Materials and Atoms

Volumn 237, Issue 1-2, 2005, Pages 197-202

  Chao, D S ^a   Shu, D Y ^a   Hung, S B ^a   Hsieh, W Y ^a   Tsai, M J ^a  

^a INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE   (Taiwan)

Author keywords

Si on insulator (SOI); Smart cut ; Surface blistering; Wafer bonding

Indexed keywords

ATOMIC FORCE MICROSCOPY; HYDROGEN; ION IMPLANTATION; SILICON WAFERS; SUBSTRATES; ULSI CIRCUITS; VLSI CIRCUITS;

SMART-CUT; SURFACE BLISTERING; WAFER BONDING;

SILICON ON INSULATOR TECHNOLOGY;

EID: 23444444738     PISSN: 0168583X     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.nimb.2005.04.093     Document Type: Conference Paper

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