-
1
-
-
0034474089
-
Analysis and optimization of synchronous buck converter at high slew rate load current transients
-
June
-
Rais Miftakhutdinov, "Analysis and Optimization of Synchronous Buck Converter at High Slew Rate Load Current Transients", IEEE Power Electronics Specialists Conference, June 2000, pp. 714-720.
-
(2000)
IEEE Power Electronics Specialists Conference
, pp. 714-720
-
-
Miftakhutdinov, R.1
-
3
-
-
0030109044
-
Design considerations for low-voltage on-board DC-DC modules for next generation of data processing circuits
-
March
-
M. T. Zhang, M. M. Jovanovic and F. C. Lee, "Design Considerations for Low-Voltage On-board DC-DC Modules for Next Generation of Data Processing Circuits", IEEE Trans. On Power Electronics, March 1996
-
(1996)
IEEE Trans. On Power Electronics
-
-
Zhang, M.T.1
Jovanovic, M.M.2
Lee, F.C.3
-
4
-
-
0036079588
-
Optimum control design of PWM buck topologies to minimize output impedance
-
March
-
A. Soto et. al., "Optimum Control Design of PWM Buck Topologies to Minimize Output Impedance", IEEE Applied Power Electronics Conference, March 2002, pp. 426-432.
-
(2002)
IEEE Applied Power Electronics Conference
, pp. 426-432
-
-
Soto, A.1
-
5
-
-
0036072455
-
Design considerations for VRM transient response based on the output impedance
-
March
-
K. Yao et. al., "Design Considerations for VRM Transient Response Based on the Output Impedance", IEEE Applied Power Electronics Conference, March 2002, pp. 14-20.
-
(2002)
IEEE Applied Power Electronics Conference
, pp. 14-20
-
-
Yao, K.1
-
6
-
-
0036076533
-
Effect of target impedance and control loop design on VRM stability
-
March
-
S. A. Chickamenahalli et. al., "Effect of Target Impedance and Control Loop Design on VRM Stability", IEEE Applied Power Electronics Conference, March 2002, pp. 196-202.
-
(2002)
IEEE Applied Power Electronics Conference
, pp. 196-202
-
-
Chickamenahalli, S.A.1
-
7
-
-
0035699395
-
Design oriented analysis of package power distribution system considering target impedance for high performance microprocessors
-
29-31 Oct. 2001
-
Om P. Mandhana, "Design Oriented Analysis of Package Power Distribution System Considering Target Impedance for High Performance Microprocessors", Electrical Performance of Electronic Packaging, 2001, 29-31 Oct. 2001, pp.273-276.
-
(2001)
Electrical Performance of Electronic Packaging
, pp. 273-276
-
-
Mandhana, O.P.1
-
8
-
-
0033343078
-
Power distribution system design methodology and capacitor selection for modern CMOS technology
-
Aug.
-
Smith, L.D.; Anderson, R.E.; Forehand, D.W.; Pelc, T.J.; Roy, T.; "Power distribution system design methodology and capacitor selection for modern CMOS technology", IEEE Trans. on Advanced Packaging, Volume: 22 Issue: 3, Aug. 1999, pp. 284-291.
-
(1999)
IEEE Trans. on Advanced Packaging
, vol.22
, Issue.3
, pp. 284-291
-
-
Smith, L.D.1
Anderson, R.E.2
Forehand, D.W.3
Pelc, T.J.4
Roy, T.5
-
9
-
-
0032123219
-
Analysis and control design of paralleled DC/DC converters with current sharing
-
July
-
V. Joseph Thottuvelil, George C. Verghese, "Analysis and Control Design of Paralleled DC/DC Converters with Current Sharing", IEEE Trans, on Power Electronics, July 1998, pp. 635-644.
-
(1998)
IEEE Trans, on Power Electronics
, pp. 635-644
-
-
Thottuvelil, V.J.1
Verghese, G.C.2
|