Interconnect thermal management of high power packaged electronic architectures

Annual IEEE Semiconductor Thermal Measurement and Management Symposium

Volumn 20, Issue , 2004, Pages 30-37

  Cook, Jason T ^a   Joshi, Yogendra K ^a   Doraiswami, Ravi ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CERAMIC PRODUCTS; COMPUTATIONAL FLUID DYNAMICS; FLIP CHIP DEVICES; HEAT TRANSFER; PRINTED CIRCUIT BOARDS; SILICON; THERMAL CONDUCTIVITY; THERMAL EXPANSION;

BALL GRID ARRAY (BGA); COEFFICIENT OF THERMAL EXPANSION (CTE); PLASTIC BALL GRID ARRAY (PBGA); THERMAL MANAGEMENT;

ELECTRONICS PACKAGING;

EID: 2342615425     PISSN: 10652221     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

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5. th edition", John Wiley & Sons, Inc., (New York, 2002), pp. 430-433.
6. Kromann, G.B., Argento, C.W., "Thermal Enhancements for Plastic-Ball-Grid-Array Interconnect Technology: Computational-fluids Dynamics Modeling and Characterization for Low-Velocity Air-Cooling", IEEE's InterSociety on Thermal Phenomena, pp.166-173, 1996.
7. Ye, H., Basaran, C., Hopkins, D. "Mechanical Degradation of Microelectronics Solder Joints Under Electrical Stress", Electronic Packaging Laboratory Newsletter, Buffalo, NY. Downloaded from the World Wide Web on 11/06/2003. http://www.packaging.buffalo.edu/newletter/summero3/ari tcle4.html