A Defect-Tolerant Memory Architecture for Molecular Electronics

IEEE Transactions on Nanotechnology

Volumn 3, Issue 1 SPEC. ISS., 2004, Pages 152-157

  Lee, Myung Hyun ^a   Kim, Young Kwan ^a   Choi, Yoon Hwa ^a  

^a Hong Ik University   (South Korea)

Author keywords

Crossbar; Defect tolerance; Memory; Molecular electronics

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; DEFECTS; ELECTRIC RESISTANCE; ELECTROCHEMISTRY; ELECTRONIC EQUIPMENT; LOGIC CIRCUITS; MATHEMATICAL MODELS; NANOTECHNOLOGY; OXIDATION; REDUCTION;

CROSSBAR; DEFECT TOLERANCE; LOGIC FUNCTIONS; MOLECULAR ELECTRONICS;

MOLECULAR DYNAMICS;

EID: 2342562592     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2004.824011     Document Type: Conference Paper

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