Junction Leakage Analysis Using Scanning Capacitance Microscopy

IEEE Transactions on Device and Materials Reliability

Volumn 4, Issue 1, 2004, Pages 46-49

  Tarun, Alvarado B ^a   Laniog, Jean N ^a   Tan, Jonah M ^a   Cana, Proceso N ^a  

^a Intel Technology Philippines Inc   (Philippines)

Author keywords

CMOS; Leakage current; Scanning capacitance microscopy (SCM)

Indexed keywords

CURRENT VOLTAGE CHARACTERISTICS; ELECTRON TUNNELING; LEAKAGE CURRENTS; MICROSCOPIC EXAMINATION; SEMICONDUCTOR DOPING; SEMICONDUCTOR JUNCTIONS;

CAPACITANCE SENSORS; DIODE TUNNELING EQUATION; SCANNING CAPACITANCE MICROSCOPY (SCM);

CMOS INTEGRATED CIRCUITS;

EID: 2342558578     PISSN: 15304388     EISSN: None     Source Type: Journal    
DOI: 10.1109/TDMR.2004.824361     Document Type: Conference Paper

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