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Volumn 52, Issue 8, 2005, Pages 1845-1850

SET/CMOS hybrid process and multiband filtering circuits

Author keywords

Filters; Hybrid integrated circuits; MOSFET; Multivalued logic; Single electron transistor (SET)

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC FILTERS; MANY VALUED LOGICS; MOSFET DEVICES; OXIDATION;

EID: 23344447878     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2005.852730     Document Type: Article
Times cited : (16)

References (7)
  • 4
    • 0038394708 scopus 로고    scopus 로고
    • "A multiple-valued logic and memory with combined single-electron and metal-oxide-semiconductor transistors"
    • Feb.
    • H. Inokawa, A. Fujiwara, and Y. Takahashi, "A multiple-valued logic and memory with combined single-electron and metal-oxide-semiconductor transistors," IEEE Trans. Electron Devices, vol. 50, no. 2, pp. 462-470, Feb. 2003.
    • (2003) IEEE Trans. Electron Devices , vol.50 , Issue.2 , pp. 462-470
    • Inokawa, H.1    Fujiwara, A.2    Takahashi, Y.3
  • 6
    • 0036539033 scopus 로고    scopus 로고
    • "Silicon single-electron transistors with sidewall depletion gates and their application to dynamic single-electron transistor logic"
    • Apr.
    • D. H. Kim, S.-K. Sung, K. R. Kim, J. D. Lee, B.-G. Park, B. H. Choi, S. W. Hwang, and D. Ahn, "Silicon single-electron transistors with sidewall depletion gates and their application to dynamic single-electron transistor logic," IEEE Trans. Electron Devices, vol. 49, no. 4, pp. 627-635, Apr. 2002.
    • (2002) IEEE Trans. Electron Devices , vol.49 , Issue.4 , pp. 627-635
    • Kim, D.H.1    Sung, S.-K.2    Kim, K.R.3    Lee, J.D.4    Park, B.-G.5    Choi, B.H.6    Hwang, S.W.7    Ahn, D.8


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.