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Volumn 6, Issue 3, 2001, Pages 322-342

Constrained polygon transformations for incremental floorplanning

Author keywords

Floorplanning; Incremental design; Rectilinear polygons

Indexed keywords


EID: 23044526631     PISSN: 10844309     EISSN: None     Source Type: Journal    
DOI: 10.1145/383251.383255     Document Type: Article
Times cited : (8)

References (10)
  • 3
    • 0027247162 scopus 로고
    • A bounded 2D contour searching algorithm for floorplan design with arbitrarily shaped rectilinear and soft modules
    • LEE, T. 1993. A bounded 2D contour searching algorithm for floorplan design with arbitrarily shaped rectilinear and soft modules. In Proceedings of the 30th ACM/IEEE Design Automation Conference, pp. 525-530.
    • (1993) Proceedings of the 30th ACM/IEEE Design Automation Conference , pp. 525-530
    • Lee, T.1
  • 5
    • 0030378255 scopus 로고    scopus 로고
    • VLSI module placement based on rectangle packing by the sequence-pair
    • Dec.
    • MURATA, H., FUJIYOSHI, F., NAKATAKE, S., AND KAJITANI, Y. 1996. VLSI module placement based on rectangle packing by the sequence-pair. IEEE Trans. Computer-Aided Design 15, 12 (Dec.), 1518-1524.
    • (1996) IEEE Trans. Computer-Aided Design , vol.15 , Issue.12 , pp. 1518-1524
    • Murata, H.1    Fujiyoshi, F.2    Nakatake, S.3    Kajitani, Y.4
  • 6
  • 7
    • 0026905725 scopus 로고
    • Optimal floorplanning area minimization
    • (Aug.)
    • WANG, T., AND WONG, D. 1992. Optimal floorplanning area minimization. IEEE Trans. Computer-Aided Design 11, 8 (Aug.), 992-1002.
    • (1992) IEEE Trans. Computer-Aided Design , vol.11 , Issue.8 , pp. 992-1002
    • Wang, T.1    Wong, D.2
  • 8
    • 52449145649 scopus 로고
    • Floorplan design of VLSI circuits
    • WONG, D. F., AND LIU, C. L. 1989. Floorplan design of VLSI circuits. Algorithmica 4, 263-291.
    • (1989) Algorithmica , vol.4 , pp. 263-291
    • Wong, D.F.1    Liu, C.L.2
  • 10
    • 0027610547 scopus 로고
    • Floorplanning by graph dualization: 2-concave rectilinear modules
    • June
    • YEAP, K., AND SARRAFZADEH, M. 1993. Floorplanning by graph dualization: 2-concave rectilinear modules. SIAM J. Comput. 22, 3 (June), 500-526.
    • (1993) SIAM J. Comput. , vol.22 , Issue.3 , pp. 500-526
    • Yeap, K.1    Sarrafzadeh, M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.