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Volumn 1917, Issue , 2000, Pages 671-680
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A genetic algorithm for vlsi floorplanning
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Author keywords
[No Author keywords available]
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Indexed keywords
ENCODING (SYMBOLS);
INTEGRATED CIRCUIT DESIGN;
SIGNAL ENCODING;
VLSI CIRCUITS;
ENCODING SCHEMES;
FLOORPLANS;
GENETIC OPERATORS;
MODULE SETS;
POSTFIX EXPRESSIONS;
RUNTIMES;
SLICING TREE;
VLSI FLOORPLANNING;
GENETIC ALGORITHMS;
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EID: 23044522437
PISSN: 03029743
EISSN: 16113349
Source Type: Book Series
DOI: 10.1007/3-540-45356-3_66 Document Type: Conference Paper |
Times cited : (9)
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References (15)
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