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Volumn , Issue , 2002, Pages 330-337

A burst-mode oriented back-end for the Balsa synthesis system

Author keywords

[No Author keywords available]

Indexed keywords

ASYNCHRONOUS SYSTEM; CLUSTER SIZES; CLUSTERING TECHNIQUES; CONTROL COMPONENTS; FULLY INTEGRATED; MICROPROCESSOR CORE; NEW COMPONENTS; SYNTHESIZABILITY;

EID: 22944459409     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2002.998294     Document Type: Conference Paper
Times cited : (21)

References (18)
  • 3
    • 0003557110 scopus 로고    scopus 로고
    • PhD Thesis, Department of Computer Science, University of Manchester
    • A. Bardsley, "Implementing Balsa Handshake Circuits", PhD Thesis, Department of Computer Science, University of Manchester, 2000.
    • (2000) Implementing Balsa Handshake Circuits
    • Bardsley, A.1
  • 4
    • 0003270928 scopus 로고
    • Handshake circuits: An asynchronous architecture for VLSI programming
    • Cambridge University Press
    • K. van Berkel, "Handshake Circuits: an Asynchronous Architecture for VLSI Programming", International Series on Parallel Computation, Vol. 5, Cambridge University Press, 1993.
    • (1993) International Series on Parallel Computation , vol.5
    • Van Berkel, K.1
  • 5
    • 38249011161 scopus 로고
    • Arbiters: An exercise in specifying and decomposing asynchronously communicating components
    • J. Ebergen, "Arbiters: an exercise in specifying and decomposing asynchronously communicating components", Science of Computer Programming, 18(3), pp. 223-245, 1992.
    • (1992) Science of Computer Programming , vol.18 , Issue.3 , pp. 223-245
    • Ebergen, J.1
  • 6
    • 0003885785 scopus 로고    scopus 로고
    • Minimalist: An environment for the synthesis, verification and testability of burst-mode asynchronous machines
    • Columbia University, July
    • R.M. Fuhrer, S.M. Nowick, M. Theobald, N.K. Jha, B. Lin, and L. Plana, "Minimalist: An Environment for the Synthesis, Verification and Testability of Burst-Mode Asynchronous Machines", Technical Report CUCS-020-99, Columbia University, July 1999.
    • (1999) Technical Report CUCS-020-99
    • Fuhrer, R.M.1    Nowick, S.M.2    Theobald, M.3    Jha, N.K.4    Lin, B.5    Plana, L.6
  • 8
    • 0002927123 scopus 로고
    • Programming in VLSI: From communicating processes to delay-insensitive circuits
    • UT Year of Programming Institute on Concurrent Programming, Addison-Wesley
    • A.J. Martin, "Programming in VLSI: From Communicating Processes to Delay-Insensitive Circuits", in Developments in Concurrency and Communication, UT Year of Programming Institute on Concurrent Programming, Addison-Wesley, 1990, pp. 1-64.
    • (1990) Developments in Concurrency and Communication , pp. 1-64
    • Martin, A.J.1
  • 9
    • 0003726759 scopus 로고
    • Automatic synthesis of burst-mode asynchronous controllers
    • Stanford University, March
    • S.M. Nowick, "Automatic Synthesis of Burst-Mode Asynchronous Controllers", Technical Report CSL-TR-95-686, Stanford University, March 1993.
    • (1993) Technical Report CSL-TR-95-686
    • Nowick, S.M.1
  • 15
    • 0003889387 scopus 로고
    • Trace theory for automatic hierarchical verification of speed-independent circuits
    • MIT Press
    • D. L. Dill, "Trace Theory for Automatic Hierarchical Verification of Speed-Independent Circuits", ACM Distinguished Dissertations, MIT Press, 1989.
    • (1989) ACM Distinguished Dissertations
    • Dill, D.L.1
  • 17
    • 4043164267 scopus 로고
    • Specification and automatic verification of self-timed queues
    • D. Dill, S.M. Nowick, and R. Sproull, "Specification and Automatic Verification of Self-Timed Queues", Formal Methods in System Design, v1, pp. 29-60, 1992.
    • (1992) Formal Methods in System Design , vol.1 , pp. 29-60
    • Dill, D.1    Nowick, S.M.2    Sproull, R.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.