Nonlinearity correction for multibit ΔΣ DACs

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 52, Issue 6, 2005, Pages 1033-1041

  Arias, Jesus ^a   Kiss, Peter ^b   Boccuzzi, Vito ^c   Quintanilla, Luis ^a   Enriquez, Lourdes ^a   Vicente, José ^a   Bisbal, David ^a   San Pablo, Jacinto ^a   Barbolla, Juan ^a  

^a UNIVERSITY OF VALLADOLID   (Spain)

^b AGERE SYSTEMS   (United States)

^c Securinex Inc   (United States)

Author keywords

Data weighted averaging (DWA); Digital correction; Digital subscriber lines (DSLs); Digital analog conversion; High speed; Multibit; Nonlinearities; Nonlinearity correction; Sigma delta modulation

Indexed keywords

ANALOG TO DIGITAL CONVERSION; APPROXIMATION THEORY; CALIBRATION; COMPUTER SIMULATION; DELTA SIGMA MODULATION; DIGITAL CIRCUITS; ERROR CORRECTION; RANDOM ACCESS STORAGE;

DIGITAL CORRECTION; DIGITAL SUBSCRIBER LINES (DSLS); MULTIBIT DIGITAL-TO-ANALOG CONVERTERS; NONLINEARITY CORRECTION;

DIGITAL TO ANALOG CONVERSION;

EID: 22144462901     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2005.849102     Document Type: Article

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