-
1
-
-
0024628272
-
Experimental study of the RSFQ logic elements
-
Mar.
-
V. K. Kaplunenko et al., "Experimental study of the RSFQ logic elements," IEEE Trans. Magn., vol. 25, no. 2, pp. 861-864, Mar. 1989.
-
(1989)
IEEE Trans. Magn.
, vol.25
, Issue.2
, pp. 861-864
-
-
Kaplunenko, V.K.1
-
2
-
-
0026116572
-
RSFQ logic/memory family: A new Josephson-junction technology for sub-terahertz-clock-frequency digital systems
-
Mar.
-
K. K. Likharev and V. K. Semenov, "RSFQ logic/memory family: A new Josephson-junction technology for sub-terahertz-clock-frequency digital systems," IEEE Trans. Appl. Supercond., vol. 1, no. 1, pp. 3-28, Mar. 1991.
-
(1991)
IEEE Trans. Appl. Supercond.
, vol.1
, Issue.1
, pp. 3-28
-
-
Likharev, K.K.1
Semenov, V.K.2
-
3
-
-
0026381436
-
Margins and yield in single flux quantum logic
-
Dec.
-
C. A. Hamilton and K. C. Gilbert, "Margins and yield in single flux quantum logic," IEEE Trans. Appl. Supercond., vol. 1, no. 4, pp. 157-163, Dec. 1991.
-
(1991)
IEEE Trans. Appl. Supercond.
, vol.1
, Issue.4
, pp. 157-163
-
-
Hamilton, C.A.1
Gilbert, K.C.2
-
4
-
-
0029326363
-
Multiparameter optimization of RSFQ circuits using the method of inscribed hyperspheres
-
Jun.
-
Q. P. Herr and M. J. Feldman, "Multiparameter optimization of RSFQ circuits using the method of inscribed hyperspheres," IEEE Trans. Appl. Supercond., vol. 5, no. 2, pp. 3337-3340, Jun. 1995.
-
(1995)
IEEE Trans. Appl. Supercond.
, vol.5
, Issue.2
, pp. 3337-3340
-
-
Herr, Q.P.1
Feldman, M.J.2
-
5
-
-
0032167314
-
Monte Carlo optimization of complementary output switching logic circuits
-
Sep.
-
M. Jeffery, W. J. Perold, Z. Wang, and T. Van Duzer, "Monte Carlo optimization of complementary output switching logic circuits," IEEE Trans. Appl. Supercond., vol. 8, no. 3, pp. 104-119, Sep. 1998.
-
(1998)
IEEE Trans. Appl. Supercond.
, vol.8
, Issue.3
, pp. 104-119
-
-
Jeffery, M.1
Perold, W.J.2
Wang, Z.3
Van Duzer, T.4
-
6
-
-
0032663495
-
Monte-Carlo yield analysis
-
Jun.
-
M. W. Johnson, Q. P. Herr, and J. W. Spargo, "Monte-Carlo yield analysis," IEEE Trans. Appl. Supercond., vol. 9, no. 2, pp. 3322-3325, Jun. 1999.
-
(1999)
IEEE Trans. Appl. Supercond.
, vol.9
, Issue.2
, pp. 3322-3325
-
-
Johnson, M.W.1
Herr, Q.P.2
Spargo, J.W.3
-
7
-
-
15844397873
-
-
[Online]
-
HYPRES. HYPRES Design Rules. [Online]. Available: http://www. hypres.com
-
HYPRES Design Rules
-
-
-
8
-
-
0035268447
-
Modeling superconducting components based on the fabrication process and layout dimensions
-
Mar.
-
W. J. Perold and C. J. Fourie, "Modeling superconducting components based on the fabrication process and layout dimensions," IEEE Trans. Appl. Supercond., vol. 11, no. 1, pp. 345-348, Mar. 2001.
-
(2001)
IEEE Trans. Appl. Supercond.
, vol.11
, Issue.1
, pp. 345-348
-
-
Perold, W.J.1
Fourie, C.J.2
-
9
-
-
22044451501
-
-
[Online]
-
Synopsys, Inc. HSPICE. [Online]. Available: http://www.synopsys.com
-
-
-
-
10
-
-
22044452182
-
-
[Online]
-
Whiteley Research Inc. [Online]. Available: http://www.srware.com
-
-
-
-
11
-
-
22044432059
-
-
Hypres, private communication
-
S. K. Tolpygo, Hypres, private communication.
-
-
-
Tolpygo, S.K.1
-
12
-
-
20744434318
-
-
Ph.D. dissertation, Dept. Electron. Eng., Stellenbosch Univ., Stellenbosch, South Africa
-
C. J. Fourie, "A tool kit for the design of superconducting programmable gate arrays," Ph.D. dissertation, Dept. Electron. Eng., Stellenbosch Univ., Stellenbosch, South Africa, 2003.
-
(2003)
A Tool Kit for the Design of Superconducting Programmable Gate Arrays
-
-
Fourie, C.J.1
-
13
-
-
22044433741
-
Inductance variations in RSFQ circuit structures
-
submitted for publication
-
C. J. Fourie and W. J. Perold, "Inductance variations in RSFQ circuit structures," IEEE Trans. Appl. Supercond., submitted for publication.
-
IEEE Trans. Appl. Supercond.
-
-
Fourie, C.J.1
Perold, W.J.2
-
14
-
-
0018707686
-
The inductance of a superconducting strip transmission line
-
Dec.
-
W. H. Chang, "The inductance of a superconducting strip transmission line," J. Appl. Phys., vol. 50, no. 12, pp. 8129-8134, Dec. 1979.
-
(1979)
J. Appl. Phys.
, vol.50
, Issue.12
, pp. 8129-8134
-
-
Chang, W.H.1
-
16
-
-
22044448642
-
An RSFQ DC-resettable latch for building memory and reprogrammable circuits
-
submitted for publication
-
C. J. Fourie and W. J. Perold, "An RSFQ DC-resettable latch for building memory and reprogrammable circuits," IEEE Trans. Appl. Supercond., submitted for publication.
-
IEEE Trans. Appl. Supercond.
-
-
Fourie, C.J.1
Perold, W.J.2
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