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Volumn 15, Issue 2 PART I, 2005, Pages 348-351

An RSFQ DC-resettable latch for building memory and reprogrammable circuits

Author keywords

Latch; Memory; NDRO; Reprogrammable circuits; RSFQ

Indexed keywords

DATA STORAGE EQUIPMENT; ELECTRIC CURRENTS; ELECTRIC LINES; JOSEPHSON JUNCTION DEVICES; LOGIC CIRCUITS; MONTE CARLO METHODS; NONDESTRUCTIVE READOUT; OPTIMIZATION; SEMICONDUCTOR DEVICE MANUFACTURE;

EID: 22044448642     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/TASC.2005.849831     Document Type: Conference Paper
Times cited : (7)

References (16)
  • 5
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    • HYPRES, 175 Clearbrook Road, Elmsford, New York, 10523. [Online] Available: Design rules are available via the HYPRES home page at http://www.hypres.com
    • HYPRES Home Page
  • 6
    • 0042943067 scopus 로고    scopus 로고
    • Comparison of genetic algorithms to other optimization techniques for raising circuit yield in superconducting digital circuits
    • June
    • C. J. Fourie and W. J. Perold, "Comparison of genetic algorithms to other optimization techniques for raising circuit yield in superconducting digital circuits," IEEE Trans. Appl. Superconduct., vol. 13, no. 2, pp. 511-514, June 2003.
    • (2003) IEEE Trans. Appl. Superconduct. , vol.13 , Issue.2 , pp. 511-514
    • Fourie, C.J.1    Perold, W.J.2
  • 7
    • 22044451103 scopus 로고    scopus 로고
    • Inductance variations in RSFQ circuit structures
    • submitted for publication
    • _, "Inductance variations in RSFQ circuit structures," IEEE Trans. Appl. Superconduct., submitted for publication.
    • IEEE Trans. Appl. Superconduct.
  • 8
    • 84897691867 scopus 로고    scopus 로고
    • [Online].
    • Whiteley Research Inc., 456 Flora Vista Avenue, Sunnyvale, CA 94086. [Online]. Available: Homepage http://www.srware.com
    • Homepage
  • 9
    • 0001314404 scopus 로고
    • New RSFQ circuits
    • March
    • S. V. Polonsky et al., "New RSFQ circuits," IEEE Trans. Appl. Superconduct., vol. 3, no. 1, pp. 2566-2577, March 1993.
    • (1993) IEEE Trans. Appl. Superconduct. , vol.3 , Issue.1 , pp. 2566-2577
    • Polonsky, S.V.1
  • 12
  • 15
    • 0029323991 scopus 로고
    • Broadband interfacing of superconducting digital systems to room temperature electronics
    • June
    • D. F. Schneider, J. C. Lin, S. V. Polonsky, and V. K. Semenov, "Broadband interfacing of superconducting digital systems to room temperature electronics," IEEE Trans. Appl. Superconduct., vol. 5, no. 2, pp. 3152-3155, June 1995.
    • (1995) IEEE Trans. Appl. Superconduct. , vol.5 , Issue.2 , pp. 3152-3155
    • Schneider, D.F.1    Lin, J.C.2    Polonsky, S.V.3    Semenov, V.K.4
  • 16
    • 22044433294 scopus 로고    scopus 로고
    • Complete Monte Carlo model description of lumped-element RSFQ logic circuits
    • submitted for publication
    • C. J. Fourie, W. J. Perold, and H. R. Gerber, "Complete Monte Carlo model description of lumped-element RSFQ logic circuits," IEEE Trans. Appl. Superconduct., submitted for publication.
    • IEEE Trans. Appl. Superconduct.
    • Fourie, C.J.1    Perold, W.J.2    Gerber, H.R.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.