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Volumn , Issue , 2004, Pages 299-302

Substituted aluminum metal gate on high-K dielectric for low work-function and fermi-level pinning free

Author keywords

[No Author keywords available]

Indexed keywords

FERMI LEVEL PINNING; FULLY SILICIDED (FUSI) METAL GATES; LEAKAGE CURRENT DISTRIBUTION; TEMPERATURE ANNEALING; ALUMINUM METAL; FULLY SILICIDED METAL GATE; GATE STRUCTURE; K DIELECTRICS; LOW TEMPERATURE ANNEALING; METAL-GATE; NMOSFETS; SUBSTITUTED ALUMINUM GATES;

EID: 21744442239     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (15)

References (6)
  • 1
    • 0033745206 scopus 로고    scopus 로고
    • Impact of gate work function on device performance at the 50 nm technology node
    • I. De, D. Johri, A. Srivastava, and C. M. Osburn, "Impact of gate work function on device performance at the 50 nm technology node," Solid-State Electronics, vol.44, pp. 1077-1080, 2000.
    • (2000) Solid-state Electronics , vol.44 , pp. 1077-1080
    • De, I.1    Johri, D.2    Srivastava, A.3    Osburn, C.M.4
  • 3
    • 0030397498 scopus 로고    scopus 로고
    • Novel high aspect ratio aluminum plug for logic/DRAM LSIs using Polysilicon-Aluminum Substitute(PAS)
    • H. Hone, M. Imai, A. Itoh, and Y. Arimoto, "Novel High Aspect Ratio Aluminum Plug for Logic/DRAM LSIs Using Polysilicon-Aluminum Substitute(PAS)," in IEDM Tech. Dig., 1996, pp. 946-948.
    • (1996) IEDM Tech. Dig. , pp. 946-948
    • Hone, H.1    Imai, M.2    Itoh, A.3    Arimoto, Y.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.