RF CMOS gate resistance and noise characterization

International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT

Volumn 1, Issue , 2004, Pages 159-162

  Tao, Jiang ^a   Rezvani, Ali ^a   Findley, Paul ^a  

^a RF Micro Devices   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHANNEL DEVICES; CIRCUIT SIMULATIONS; GATE RESISTANCE; SOC SOLUTIONS;

ITERATIVE METHODS; MATHEMATICAL MODELS; MICROWAVES; MOSFET DEVICES; NATURAL FREQUENCIES; OPTIMIZATION; SEMICONDUCTING SILICON;

CMOS INTEGRATED CIRCUITS;

EID: 21644442219     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

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2. D.R. Pehlke, et al., "High frequency application of MOS compact model and their development for scalable RF model libraries," Proc. Of CICC, p.219, May 1998.
3. X. Jin, et al., "An effective gate resistance model for CMOS RF and noise modeling", IEDM Tech. Dig., p.961, Dec. 1998.
4. Y. Cheng, et al., "High frequency characterization of gate resistance in RF MOSFETs," IEEE EDL, vol.22, no.2, p.98, 2001.
5. A. Scholten, et al., "Noise modeling for RFCMOS circuit simulation," IEEE TED, vol.50, no.3, p.618, 2003.
6. M. Chan, et al., "A relaxation time approach to model the Non-Quasi-Static transient effects in MOSFETs," IEDM Tech Dig., p.169, 1994.
7. nd edition, New Jersey: Prentice Hall, 1997.