A software-hardware co-implementation of MPEG-4 Advanced Video Coding (AVC) decoder with block level pipelining

Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology

Volumn 41, Issue 1, 2005, Pages 93-110

  Wang, Shih Hao ^a   Peng, Wen Hsiao ^a   He, Yuwen ^b   Lin, Guan Yi ^a   Lin, Cheng Yi ^a   Chang, Shih Chien ^a   Wang, Chung Neng ^a   Chiang, Tihao ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^b TSINGHUA UNIVERSITY   (China)

Author keywords

Advanced video coding (AVC); H.264; Joint video team (JVT); MB level pipelining; MPEG 4; Software hardware co implementation; Task partition

Indexed keywords

ADVANCED VIDEO CODING (AVC); H.264; JOINT VIDEO TEAM (JVT); MB LEVEL PIPELINING; MPEG-4; SOFTWARE-HARDWARE CO-IMPLEMENTATION; TASK PARTITION;

ALGORITHMS; COMPUTER HARDWARE; COMPUTER SOFTWARE; DECODING; MOTION COMPENSATION; MOTION PICTURES; MULTIMEDIA SYSTEMS; OPTIMIZATION;

IMAGE CODING;

EID: 21544452791     PISSN: 13875485     EISSN: None     Source Type: Journal    
DOI: 10.1007/s11265-005-6253-3     Document Type: Article

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