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Volumn 9, Issue 6, 2005, Pages 534-536
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Flexible construction of irregular partitioned permutation LDPC codes with low error floors
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Author keywords
Error floor; Low density parity check codes; Permutation matrix; Stopping set
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Indexed keywords
BIT ERROR RATE;
COMPUTER SIMULATION;
DECODING;
MATRIX ALGEBRA;
SET THEORY;
WHITE NOISE;
ERROR FLOOR;
LOW DENSITY PARITY CHECK CODES;
PERMUTATION MATRIX;
STOPPING SET;
CODES (SYMBOLS);
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EID: 21444446196
PISSN: 10897798
EISSN: None
Source Type: Journal
DOI: 10.1109/LCOMM.2005.1437362 Document Type: Article |
Times cited : (20)
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References (10)
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