The effects of device dimensions on the post-breakdown characteristics of ultrathin gate oxides

IEEE Electron Device Letters

Volumn 26, Issue 6, 2005, Pages 401-403

  Wu, Ernest Y ^a   Suñé, Jordi ^b  

^a IBM MICROELECTRONICS   (United States)

^b UNIVERSITAT AUTÒNOMA DE BARCELONA   (Spain)

Author keywords

Dielectric breakdown; MOS devices; Progressive breakdown; Reliability; Soft and hard breakdowns; TDDB

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC BREAKDOWN; FIELD EFFECT TRANSISTORS; MOS DEVICES; PROBABILITY; RELIABILITY; SEMICONDUCTOR DEVICE MANUFACTURE;

DIELECTRIC BREAKDOWN; HARD BREAKDOWN; PROGRESSIVE BREAKDOWN; SOFT BREAKDOWN; TDDB; ULTRATHIN GATE OXIDES;

GATES (TRANSISTOR);

EID: 20544459357     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2005.848072     Document Type: Article

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