Critical Assessment of Soft Breakdown Stability Time and the Implementation of New Post-Breakdown Methodology for ultra-thin gate oxides

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2003, Pages 919-922

  Wu, E ^a   Sune J ^c   Linder, B ^b   Stathis, J ^b   Lai, W ^a  

^a IBM MICROELECTRONICS   (United States)

^b IBM RESEARCH   (United States)

^c UNIVERSITAT AUTÒNOMA DE BARCELONA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC BREAKDOWN OF SOLIDS; ELECTRIC CURRENT MEASUREMENT; FAILURE ANALYSIS; MODAL ANALYSIS; OXIDES; RELIABILITY THEORY; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DEVICE STRUCTURES; STATISTICAL TESTS; STRESS ANALYSIS; THIN FILM TRANSISTORS; ULTRATHIN FILMS; VOLTAGE MEASUREMENT; WEIBULL DISTRIBUTION;

HARD BREAKDOWN (HBD) MODES; SOFT BREAKDOWN (SBD) MODES; ULTRA-THIN GATE OXIDES;

GATES (TRANSISTOR);

EID: 17644443481     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

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