Optimal power converter topology for powering future microprocessor demands

IECON Proceedings (Industrial Electronics Conference)

Volumn 1, Issue , 2004, Pages 530-535

  Singh, Ravinder Pal ^a   Khambadkone, Ashwin M ^a   Samudra, Ganesh S ^a   Liang, Yung C ^a  

^a NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

HIGH COMPUTATION SPEEDS; MOORE'S LAW; MOTHERBOARDS; VOLTAGE REGULATOR MODULE (VRM);

ELECTRIC LOAD MANAGEMENT; ELECTRIC NETWORK TOPOLOGY; ELECTRIC POTENTIAL; ELECTRIC POWER DISTRIBUTION; ELECTRIC POWER UTILIZATION; MOSFET DEVICES; NATURAL FREQUENCIES;

POWER CONVERTERS;

EID: 20544454568     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IECON.2004.1433364     Document Type: Conference Paper

References (10)

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