Implementation of a 4th-generation 1.8GHz dual-core SPARC V9 microprocessor

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 48, Issue , 2005, Pages

  Hart, Jason ^a   Choe, Swee Yew ^a   Cheng, Lik ^a   Chou, Chipai ^a   Dixit, Anand ^a   Ho, Kenneth ^a   Hsu, Jesse ^a   Lee, Kyung ^a   Wu, John ^a  

^a SUN MICROSYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FOURTH-GENERATION PROCESSOR; LEVEL3 TAG;

BUFFER STORAGE; COMPUTER HARDWARE; ENERGY DISSIPATION;

MICROPROCESSOR CHIPS;

EID: 28144440657     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (0)