Low temperature crystallized Ta 2O 5/Nb 2O 5 bi-layers integrated into RIR capacitor for 60 nm generation and beyond

Microelectronic Engineering

Volumn 80, Issue SUPPL., 2005, Pages 317-320

  Cho, Kyuho ^a   Lee, Jinil ^a   Lim, Jae Soon ^a   Lim, Hanjin ^a   Lee, Junghyun ^b   Park, Sungho ^b   Yoo, Cha Young ^a   Kim, Sung Tae ^a   Chung, U In ^a   Moon, Joo Tae ^a  

^a SAMSUNG Electronics   (South Korea)

^b Samsung Advanced Institute of Technology (SAIT)   (South Korea)

Author keywords

DRAM capacitor; RIR; Ta 2O 5 Nb 2O 5

Indexed keywords

CRYSTALLIZATION TEMPERATURE; DRAM CAPACITOR; RIR; TA2O5/NB2O5;

ANNEALING; CRYSTALLIZATION; DEPOSITION; DIELECTRIC MATERIALS; DYNAMIC RANDOM ACCESS STORAGE; LOW TEMPERATURE EFFECTS; NIOBIUM COMPOUNDS; TANTALUM COMPOUNDS;

CAPACITORS;

EID: 19944376872     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mee.2005.04.032     Document Type: Conference Paper

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