Validation & verification of intelligent and adaptive control systems

Collection of Technical Papers - AIAA Guidance, Navigation, and Control Conference

Volumn 4, Issue , 2004, Pages 2609-2621

  Tallant, Gregory S ^a   Buffington, James M ^a   Crum, Vincent W ^b   Krogh, Bruce ^c   Plaisted, Clinton ^a   Prasanth, Ravi ^d   Bose, Prasanta ^a   Johnson, Tim ^e  

^a LOCKHEED MARTIN   (United States)

^b AIR FORCE RESEARCH LABORATORY   (United States)

^c CARNEGIE MELLON UNIVERSITY   (United States)

^d SCIENTIFIC SYSTEMS COMPANY INC   (United States)

^e GE GLOBAL RESEARCH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FLIGHT CERTIFICATION; MILITARY AEROSPACE SYSTEMS; SAFETY RISKS; SOFTWARE ALGORITHMS;

ADAPTIVE CONTROL SYSTEMS; AEROSPACE APPLICATIONS; ALGORITHMS; COMPUTER HARDWARE; COMPUTER SOFTWARE; COST BENEFIT ANALYSIS; FLIGHT DYNAMICS; MATHEMATICAL MODELS; MILITARY OPERATIONS; SAFETY FACTOR;

INTELLIGENT CONTROL;

EID: 19944376179     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (19)

1. Clough B., "Autonomous UAV Control System Safety - What Should It Be, How Do We Reach It, And What Should We Call It?," 2000 NAECON.
2. Eberhardt R.L. and Ward D. G., "Indirect Adaptive Flight Control of a Tailless Fighter Aircraft", 1999 AIAA Guidance, Navigation, and Control Conference, Portland, OR, Paper 99-4042.
3. Niestroy M.A. and Eberhardt R.L., "Control Upset Prevention and Recovery for Enhanced Aviation Safety", 2000 Digital Avionics Systems Conference, Philadelphia, PA, Paper 202.
4. Renau J., Tuck J., Liu W., and Torrellas J., "Morphable Multithreaded Memory Tiles (M3T) Architecture," University of Illinois UIUC-CS Technical Report, September 2002
5. Keckler S. W., Burger D., Moore C. R., Nagarajan R., Sankaralingam K., Agarwal V., Hrishikesh M. S, Ranganathan N., and Shivakumar P., "A Wire-Delay Scalable Microprocessor Architecture for High Performance Systems", IEEE International Solid-State Circuits Conference, February 2003.
6. Taylor M. B., Lee W., Amarasinghe S., and Agarwal A., "Scalar Operand Networks: On-chip Interconnect for ILP in Partitioned Architectures." Proceedings of the International Symposium on High Performance Computer Architecture, February 2003.
7. Watson A. H. and McCabe T. J., "Structured Testing: A Testing Methodology Using the Cyclomatic Complexity Metric." National Institute of Standards and Technology, NIST Special Publication 500-235, August 1996.
8. Gluch D. and Weinstock, C., "Model-Based Verification: A Technology for Dependable System Upgrade," CMU/SEI-98-TR-009, ADA 354756.
9. Seto D., Krogh B., Sha L., Cury J., Chutinan A., and Biswas A., "Safe Online Control Upgrades with the Simplex Architecture - A Hybrid System," Hybrid Systems and Autonomous Control Workshop.
10. Prasanth R. K., Boskovic J. D., and Mehra R. K., "Development of Assurance Techniques for High-Confidence Flight Software Design for Autonomous Unmanned Air Vehicles," DARPA Phase I SBIR final report, SSCI Report No: 1311, 2001.
11. Boskovic J. D. and Mehra R. K., "Computer Simulation Analysis for Reconfigurable Flight Control Design," 2002 AIAA Modeling and Simulation Conference and Exhibit, Monterey, California, August 2002, AIAA-2002-4787.
12. Davis M. H. A., Markov Models and Optimization, Monographs on Statistics and Applied Probability, Vol. 49, Chapman and Hill, New York, 1993.
13. Rimvall C.M., Spang H.A. III, Farrell, J.A., Radecki M., and Idelchik M., "An open architecture for automatic code generation using the BEACON CAGE environment," IEEE/IFAC Joint Symposium on Computer-Aided Control System Design, p. 315-320, 1994.
14. Henzinger T.A.; Pei-Hsin Ho; Wong-Toi, "HYTECH: a model checker for hybrid systems," International Journal on Software Tools for Technology Transfer, vol.1, no. 1-2 p. 110-22, Dec. 1997.
15. McMillan, "Symbolic model checking: an approach to the state space explosion problem," Carnegie Mellon University, School of Computer Science, Ph. D. Thesis, 1992.
16. Silva I. and Krogh B., "Formal verification of hybrid systems using CheckMate: a case study," 2000 American Control Conference, Chicago, June 2000.
17. Prasanth R. K., Boskovic J. D., and Mehra R. K., "Mixed integer/LMI approach to low level path planning," Proceedings of the American Control Conference, May 2002.
18. Blackburn M., Busser R., Nauman A., "Removing Requirement Defects and Automating Test," 2001 Software Productivity Consortium.
19. Garcia M. L and Bray O. H., "Fundamentals of Technology Roadmapping," Sandia National Laboratories Unlimited Release Document, SAND97-0665.