Effect of the interfacial SiO2 layer thickness on the dominant carrier type in leakage currents through HfAlOx/SiO2 gate dielectric films

Applied Physics Letters

Volumn 85, Issue 25, 2004, Pages 6227-6229

  Mizubayashi, Wataru ^a   Yasuda, Naoki ^a   Hisamatsu, Hirokazu ^a   Iwamoto, Kunihiko ^a   Tominaga, Koji ^a   Yamamoto, Katsuhiko ^a   Ota, Hiroyuki ^a   Horikawa, Tsuyoshi ^a   Nabatame, Toshihide ^a   Toriumi, Akira ^a,b  

^a NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

^b UNIVERSITY OF TOKYO   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CONDUCTIVITY; ELECTRIC CURRENTS; ELECTRIC POTENTIAL; ELECTRON TUNNELING; GATES (TRANSISTOR); MISFET DEVICES; POLYCRYSTALLINE MATERIALS; SEMICONDUCTING SILICON; THIN FILMS; TRANSMISSION ELECTRON MICROSCOPY;

ACTIVATION ANNEALING; CARRIER SEPARATION; GATE DIELECTRIC FILMS; LAYER THICKNESS;

LEAKAGE CURRENTS;

EID: 19944373871     PISSN: 00036951     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.1840120     Document Type: Article

References (5)

1. S. Takagi, N. Yasuda, and A. Toriumi, IEEE Trans. Electron Devices 46, 335 (1999).
2. W. Y. Loh, B. J. Cho, M. S. Joo, M. F. Li, D. SH. Chan, S. Mathew, and D.-L. Kwong, Tech. Dig. - Int. Electron Devices Meet. 2003, 927 (2003).
3. T. Nabatame, K. Iwamoto, H. Ota, K. Tominaga, H. Hisamatsu, T. Yasuda, K. Yamamoto, W. Mizubayashi, Y. Morita, N. Yasuda, M. Ohno, T. Horikawa, and A. Toriumi, 2003 Symposium on VLSI Technology Digest, 2003, p. 25.
4. S. Miyazaki, J. Vac. Sci. Technol. B 19, 2212 (2001).
5. H. Y. Yu, M. F. Li, B. J. Cho, C. C. Yeo, M. S. Joo, D.-L. Kwong, J. S. Pan, C. H. Ang, J. Z. Zheng, and S. Ramanathan, Appl. Phys. Lett. 81, 376 (2002).