메뉴 건너뛰기




Volumn 85, Issue 8, 2005, Pages 1611-1622

Phase error dynamics of a class of modified second-order digital phase-locked loops in the background of cochannel interference

Author keywords

Bifurcation phenomena; Cochannel interference; Nonuniform sampling digital phase locked loop (NUS DPLL); Stability criteria

Indexed keywords

BIFURCATION (MATHEMATICS); COCHANNEL INTERFERENCE; COMMUNICATION CHANNELS (INFORMATION THEORY); DIGITAL SIGNAL PROCESSING; ERROR ANALYSIS; OSCILLATORS (ELECTRONIC); PHASE CONTROL; STABILITY CRITERIA; TIME VARYING SYSTEMS;

EID: 19844369872     PISSN: 01651684     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sigpro.2005.03.002     Document Type: Article
Times cited : (15)

References (14)
  • 1
    • 0019558620 scopus 로고
    • A survey of digital phase lock loops
    • W.C. Lindsey, and C.M. Chie A survey of digital phase lock loops Proc. IEEE 69 4 April 1981 410 431
    • (1981) Proc. IEEE , vol.69 , Issue.4 , pp. 410-431
    • Lindsey, W.C.1    Chie, C.M.2
  • 2
    • 0016025614 scopus 로고
    • Discrete time analysis of nonuniform sampling first- and second-order digital phase locked loops
    • A. Weinberg, and B. Liu Discrete time analysis of nonuniform sampling first- and second-order digital phase locked loops IEEE Trans. Comm. COM-22 February 1974 123 137
    • (1974) IEEE Trans. Comm. , vol.COM-22 , pp. 123-137
    • Weinberg, A.1    Liu, B.2
  • 3
    • 0019045873 scopus 로고
    • Stability analysis of an Nth power digital phase-locked loop - Part II: Second and third order DPLL's
    • H.C. Osborne Stability analysis of an Nth power digital phase-locked loop - part II: second and third order DPLL's IEEE Trans. Comm. COM-28 8 August 1980 1355 1364
    • (1980) IEEE Trans. Comm. , vol.COM-28 , Issue.8 , pp. 1355-1364
    • Osborne, H.C.1
  • 4
  • 5
    • 0028438994 scopus 로고
    • A new look into the acquisition properties of a second-order digital phase locked loop
    • B.C. Sarkar, and S. Chattopadhyay A new look into the acquisition properties of a second-order digital phase locked loop IEEE Trans. Comm. 42 5 May 1994 2087 2091
    • (1994) IEEE Trans. Comm. , vol.42 , Issue.5 , pp. 2087-2091
    • Sarkar, B.C.1    Chattopadhyay, S.2
  • 6
    • 0024641591 scopus 로고
    • Acquisition problem of a class of 2nd order DPLLs
    • B.C. Sarkar, and S. Chattopadhyay Acquisition problem of a class of 2nd order DPLLs Electron. Lett. 25 8 April 1989 552 553
    • (1989) Electron. Lett. , vol.25 , Issue.8 , pp. 552-553
    • Sarkar, B.C.1    Chattopadhyay, S.2
  • 7
    • 0035311123 scopus 로고    scopus 로고
    • Some advances and refinements in digital phase locked loops (DPLLs)
    • M. Zoltowski Some advances and refinements in digital phase locked loops (DPLLs) Signal Processing 81 2001 735 789
    • (2001) Signal Processing , vol.81 , pp. 735-789
    • Zoltowski, M.1
  • 8
    • 17644371632 scopus 로고    scopus 로고
    • Phase error dynamics of a class of DPLLs in presence of cochannel interference
    • T. Banerjee, and B.C. Sarkar Phase error dynamics of a class of DPLLs in presence of cochannel interference Signal Processing 85 6 2005 1139 1147
    • (2005) Signal Processing , vol.85 , Issue.6 , pp. 1139-1147
    • Banerjee, T.1    Sarkar, B.C.2
  • 9
    • 0030170422 scopus 로고    scopus 로고
    • Frequency granularity in digital phase lock loops
    • F.M. Gardner Frequency granularity in digital phase lock loops IEEE Trans. Comm. 44 6 June 1996 749 758
    • (1996) IEEE Trans. Comm. , vol.44 , Issue.6 , pp. 749-758
    • Gardner, F.M.1
  • 10
    • 0032674201 scopus 로고    scopus 로고
    • Phase-jitter dynamics of digital phase-locked loops
    • A. Teplinsky, and Orla Feely Phase-jitter dynamics of digital phase-locked loops IEEE Trans. Circuit Systems - I 42 4 April 2000 545 558
    • (2000) IEEE Trans. Circuit Systems - I , vol.42 , Issue.4 , pp. 545-558
    • Teplinsky, A.1    Feely, O.2
  • 11
    • 0024073448 scopus 로고
    • Novel quick-response digital phase-locked loop
    • B.C. Sarkar, and S. Chattopadhyay Novel quick-response digital phase-locked loop Electron. Lett. 24 20 November 1988 1263 1264
    • (1988) Electron. Lett. , vol.24 , Issue.20 , pp. 1263-1264
    • Sarkar, B.C.1    Chattopadhyay, S.2
  • 12
    • 0029521673 scopus 로고
    • Digital phase-locked loops with a wide locking range using a fractional devider
    • F. Sato, T. Saba, S. Mori, and D.K. Park Digital phase-locked loops with a wide locking range using a fractional devider Electron. Comm. Jpn., Part-I: Comm. 78 12 December 1995 74 82
    • (1995) Electron. Comm. Jpn., Part-I: Comm. , vol.78 , Issue.12 , pp. 74-82
    • Sato, F.1    Saba, T.2    Mori, S.3    Park, D.K.4
  • 14
    • 0008494528 scopus 로고
    • Determining Lyapunov exponent from a time series
    • A. Wolf, J.B. Swift, H.L. Swinney, and J.A. Vastano Determining Lyapunov exponent from a time series Physica 16D 1985 285 317
    • (1985) Physica , vol.16 , pp. 285-317
    • Wolf, A.1    Swift, J.B.2    Swinney, H.L.3    Vastano, J.A.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.