Phase error dynamics of a class of DPLLs in presence of cochannel interference

Signal Processing

Volumn 85, Issue 6, 2005, Pages 1139-1147

  Banerjee, T ^a   Sarkar, B C ^a  

^a UNIVERSITY OF BURDWAN   (India)

Author keywords

Cochannel interference; Digital phase locked loop (DPLL); Stability criteria

Indexed keywords

BIFURCATION (MATHEMATICS); COCHANNEL INTERFERENCE; COMMUNICATION SYSTEMS; COMPUTER SIMULATION; DIGITAL FILTERS; ERROR ANALYSIS; ERRORS; FEEDBACK CONTROL; PERTURBATION TECHNIQUES; SAMPLING; STABILITY CRITERIA; TIME DOMAIN ANALYSIS;

ADDITIONAL ERROR SIGNALS (AES); ANGULAR FREQUENCIES; BIFURCATION THEORY; DIGITAL PHASE LOCKED LOOPS (DPLL);

PHASE LOCKED LOOPS;

EID: 17644371632     PISSN: 01651684     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sigpro.2004.12.005     Document Type: Article

References (8)

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