Phase-jitter dynamics of digital phase-locked loops

IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications

Volumn 46, Issue 5, 1999, Pages 545-558

  Teplinsky, Alexey ^b   Feely, Orla ^a,c   Rogers, Alan ^a,d  

^a IEEE   (Ireland)

^b INSTITUTE OF MATHEMATICS   (Ukraine)

^c UNIVERSITY COLLEGE DUBLIN   (Ireland)

^d Electricity Supply Board Ireland   (Ireland)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCLE ROTATION MAP; NUMBER CONTROLLED OSCILLATOR; PHASE JITTER;

COMPUTER SIMULATION; DIGITAL CIRCUITS; DYNAMICS; MATHEMATICAL MODELS; NONLINEAR NETWORK ANALYSIS; OSCILLATORS (ELECTRONIC); SPURIOUS SIGNAL NOISE;

PHASE LOCKED LOOPS;

EID: 0032674201     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/81.762920     Document Type: Article

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