Simulated threshold voltage adjustment and drain current enhancement in novel striped-gate nondoped-channel fully depleted SOI-MOSFETs

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 39, Issue 4 B, 2000, Pages 2229-2235

  Koh, Risho ^a  

^a NEC CORPORATION   (Japan)

Author keywords

FET; Metal gate; Mobility; MOS; SOI; Threshold voltage

Indexed keywords

CAPACITANCE; COMPUTER SIMULATION; ELECTRIC CURRENTS; ELECTRIC FIELDS; ELECTRODES; GATES (TRANSISTOR); LOGIC GATES; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR DOPING; SILICON ON INSULATOR TECHNOLOGY; THRESHOLD VOLTAGE; VOLTAGE CONTROL;

CHANNEL DOPING; DRAIN CURRENT; GATE ELECTRODE;

MOSFET DEVICES;

EID: 19644378132     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/jjap.39.2229     Document Type: Article

References (17)

1. T. Nishimura, Y. Yamaguchi, M. Shimizu, K. Tsukamoto and Y. Akasaka: IEEE Int. Electron Device Meet. Tech. Dig. (1991) p. 109.
2. J. Chen, S. Parke, J. King, F. Assaderaghi, P. K. Ko and C. M. Hu: IEEE Int. Electron Device Meet. Tech. Dig. (1992) p. 35.
3. Y. Kado: IEICE Trans. Electron. E80-C (1997) 443.
4. M. Yoshimi, H. Hazama, M. Takahashi, S. Kambayashi and H. Tango: Electron. Lett. 24 (1988) 1078.
5. J. T. Watt and J. D. Plummet: Syinp. 1987 VLSI Tech. (1987) p. 81.
6. S. Takagi, M. Iwase and A. Toriumi: IEEE Int. Electron Device Meet. Tech. Dig. (1988) p. 398.
7. S. Takagi, A. Toriumi, M. Iwase and H. Tango: IEEE Trans. Electron Devices ED-41 (1994) 2357.
8. T. Aoki, M. Tomizawa and A. Yoshii: IEEE Trans. Electron Devices ED-36 (1989) 1725.
9. J. M. Hwang and G. Pollack: Proc. IEEE Int. SOI Conf. (1992) p. 148.
10. J. M. Hwang and G. Pollack: IEEE Int. Electron Device Meet. Tech. Dig. (1992) p. 345.
11. H. Shimada, Y. Hirano, T. Ushiki and T. Ohmi: IEEE Int. Electron Device Meet. Tech. Dig. (1995) p. 881.
12. T. Ushiki, M. C. Yu, Y. Hirano, H. Shimada, M. Morita and T. Ohmi: IEEE Int. Electron Device Meet. Tech. Dig. (1996) p. 117.
13. I. Yokota, N. Sugawara, N. Kumashiro and S. Asada: Proc. 1998 Electronics Society Conf. IEICE, C-ll-2, No.2 (1998) p. 77 [in Japanese].
14. R. Koh, H. Kato and H. Matsumoto: Jpn. J. Appl. Phys. 35 (1996) 996.
15. R. Koh and H. kato: Jpn. J. Appl. Phys. 34 (1995) 836.
16. T. Shima, T. Sugawara, S. Moriyama and H. Yamada: IEEE J.Solid-State Circuit SC-17 (1982) 449.
17. K. Aoyama, M. Tomizawa and S.Tazawa: Tech. Rep. of IEICE SDM98-142 (1998) 65 [in Japanese].