Topology optimization for application-specific networks-on-chip

International Workshop on System Level Interconnect Prediction, SLIP

Volumn , Issue , 2004, Pages 53-60

  Ahonen, Tapani ^a   Bin, Hong ^a   Sigüenza Tortosa, David A ^a   Nurmi, Jari ^a  

^a TAMPERE UNIVERSITY OF TECHNOLOGY   (Finland)

Author keywords

Application Specific Network; Network on Chip; Platform Design; Topology Optimization

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; DATA COMMUNICATION SYSTEMS; MATHEMATICAL MODELS; OPTIMIZATION; SCHEDULING; TOPOLOGY;

APPLICATION-SPECIFIC NETWORK; METAL LAYERS; NETWORK-ON-CHIP; PLATFORM DESIGN; TOPOLOGY OPTIMIZATION;

INTEGRATED CIRCUIT LAYOUT;

EID: 19544384566     PISSN: None     EISSN: 15445631     Source Type: Conference Proceeding    
DOI: 10.1145/966747.966758     Document Type: Conference Paper

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