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Volumn , Issue , 2003, Pages 309-317

Performance, energy, and reliability tradeoffs in replicating hot cache lines

Author keywords

Cache Memories; Cache Reliability; Leakage Power; Line Replication

Indexed keywords

COMPUTER ARCHITECTURE; ELECTRIC POWER UTILIZATION; ENERGY EFFICIENCY; LEAKAGE CURRENTS; OPTIMIZATION; PERFORMANCE;

EID: 18844451753     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/951746.951750     Document Type: Conference Paper
Times cited : (10)

References (16)
  • 2
    • 0003465202 scopus 로고    scopus 로고
    • The simpleScalar tool-set. version 2.0
    • Department of Computer Science, UW, June
    • D. C. Burger and T. M. Austin. The SimpleScalar tool-set. Version 2.0, Technical Report 1342, Department of Computer Science, UW, June, 1997.
    • (1997) Technical Report , vol.1342
    • Burger, D.C.1    Austin, T.M.2
  • 3
    • 18844453115 scopus 로고    scopus 로고
    • CACTI 3.0. http://research.compaq.com/wrl/people/jouppi/CACTI.html
  • 9
    • 0345045434 scopus 로고    scopus 로고
    • An adaptive write error detection technique in on-chip caches of multi-level caching systems
    • March
    • S. Kim and A. K. Somani. An adaptive write error detection technique in on-chip caches of multi-level caching systems. Journal of Microprocessors and Microsystems, 22(9):561-570, March 1999.
    • (1999) Journal of Microprocessors and Microsystems , vol.22 , Issue.9 , pp. 561-570
    • Kim, S.1    Somani, A.K.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.