An efficient quality-aware memory controller for multimedia platform SoC

IEEE Transactions on Circuits and Systems for Video Technology

Volumn 15, Issue 5, 2005, Pages 620-633

  Lee, Kun Bin ^a   Lin, Tzu Chieh ^a   Jen, Chein Wei ^b  

^a MEDIATEK INC   (Taiwan)

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

Memory controller; Multimedia application; Quality aware scheduler (QAS)

Indexed keywords

BANDWIDTH; CHIP SCALE PACKAGES; CONTROL EQUIPMENT; DYNAMIC RANDOM ACCESS STORAGE; INTEGRATED CIRCUIT LAYOUT; MULTILAYERS; STATIC RANDOM ACCESS STORAGE; VLSI CIRCUITS;

MEMORY CONTROLLERS; MULTIMEDIA APPLICATION; QUALITY-AWARE SCHEDULERS (QAS); SYSTEM-ON-A-CHIP (SOC);

MULTIMEDIA SYSTEMS;

EID: 18844418513     PISSN: 10518215     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSVT.2005.846412     Document Type: Article

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