Duty cycle aware application design using FPGAs

Proceedings - 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2004

Volumn , Issue , 2004, Pages 338-339

  Mohanty, Sumit ^a   Prasanna, Viktor K ^a  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DUTY CYCLE; DUTY CYCLE SPECIFICATION; KERNEL; MOBILE PHONES;

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; AUTOMATIC TARGET RECOGNITION; COMPUTER HARDWARE DESCRIPTION LANGUAGES; ELECTRIC CLOCKS; ENERGY DISSIPATION; LEAKAGE CURRENTS; MOBILE TELECOMMUNICATION SYSTEMS; PROGRAM COMPILERS; SIGNAL PROCESSING; SPECIFICATIONS;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 18644375132     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FCCM.2004.30     Document Type: Conference Paper

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