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Volumn 151, Issue 2, 2004, Pages 167-172

Design of an optimised 2.5 GHz CMOS differential LC oscillator

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC CURRENTS; ELECTRIC IMPEDANCE; ELECTRIC INVERTERS; ELECTRIC POTENTIAL; OPTIMIZATION; OSCILLATIONS; OSCILLATORS (ELECTRONIC); PARAMETER ESTIMATION;

EID: 1842507134     PISSN: 13502417     EISSN: None     Source Type: Journal    
DOI: 10.1049/ip-map:20040164     Document Type: Conference Paper
Times cited : (7)

References (11)
  • 2
    • 0032075292 scopus 로고    scopus 로고
    • On-chip spiral inductors with patterned ground shields for Si-based RF lcs
    • Yue, C.P., and Wong, S.S.: 'On-chip spiral inductors with patterned ground shields for Si-based RF lcs', IEEE J. Solid-State Circuits, 1998, 33, (5), pp. 743-752
    • (1998) IEEE J. Solid-state Circuits , vol.33 , Issue.5 , pp. 743-752
    • Yue, C.P.1    Wong, S.S.2
  • 3
    • 0032635507 scopus 로고    scopus 로고
    • Design issues in CMOS differential LC oscillators
    • Hajimiri, A., and Lee, T.H.: 'Design issues in CMOS differential LC oscillators', IEEE J. Solid-State Circuits, 1999, 34, (5), pp. 717-724
    • (1999) IEEE J. Solid-state Circuits , vol.34 , Issue.5 , pp. 717-724
    • Hajimiri, A.1    Lee, T.H.2
  • 4
    • 84938174380 scopus 로고
    • A simple model of feedback oscillator noise spectrum
    • Leeson, D.B.: 'A simple model of feedback oscillator noise spectrum', Proc. IEEE, 1966, pp. 329-330
    • (1966) Proc. IEEE , pp. 329-330
    • Leeson, D.B.1
  • 6
    • 0030105412 scopus 로고    scopus 로고
    • Study of phase noise in CMOS oscillators
    • Razavi, B.: 'Study of phase noise in CMOS oscillators', IEEE J. Solid-State Circuits, 1996, 31, (3), pp. 331-343
    • (1996) IEEE J. Solid-state Circuits , vol.31 , Issue.3 , pp. 331-343
    • Razavi, B.1
  • 7
    • 0035391650 scopus 로고    scopus 로고
    • Low-power low-phase-noise differentially tuned quadrature VCO design in standard CMOS
    • Tiebout, M.: 'Low-power low-phase-noise differentially tuned quadrature VCO design in standard CMOS', IEEE J. Solid-State Circuits, 2001, 36, (7), pp. 1018-1024
    • (2001) IEEE J. Solid-state Circuits , vol.36 , Issue.7 , pp. 1018-1024
    • Tiebout, M.1
  • 8
    • 0031146007 scopus 로고    scopus 로고
    • A 1.8-GHz low-phase-noise CMOS VCO using optimized hollow spiral inductors
    • Craninckx, J., and Steyaert, M.: 'A 1.8-GHz low-phase-noise CMOS VCO using optimized hollow spiral inductors', IEEE J. Solid-State Circuits, 1997, 32, pp. 736-744
    • (1997) IEEE J. Solid-state Circuits , vol.32 , pp. 736-744
    • Craninckx, J.1    Steyaert, M.2
  • 9
    • 34748847200 scopus 로고    scopus 로고
    • Low supply voltage fully integrated CMOS VCO with three terminals spiral inductor
    • Duisburg, Germany, Sept.
    • Itoh, N., De Muer, B., and Steyaert, M.S.: 'Low supply voltage fully integrated CMOS VCO with three terminals spiral inductor', in Proc. 25th European solid-state circuits Conf., Duisburg, Germany, Sept. 1999, pp. 207-209
    • (1999) Proc. 25th European Solid-state Circuits Conf. , pp. 207-209
    • Itoh, N.1    De Muer, B.2    Steyaert, M.S.3
  • 10
    • 0344211084 scopus 로고    scopus 로고
    • A 1.24-GHz monolithic CMOS VCO with phase noise of -137dBc/Hz at a 3-MHz offset
    • Hung, C.-M., and O, K.K.: 'A 1.24-GHz monolithic CMOS VCO with phase noise of -137dBc/Hz at a 3-MHz offset', IEEE Microw. Guid Wave Lett., 1999, 9, pp. 331-343
    • (1999) IEEE Microw. Guid Wave Lett. , vol.9 , pp. 331-343
    • Hung, C.-M.1    O, K.K.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.