I/O Self-Leakage Test

Proceedings - International Test Conference

Volumn , Issue , 2004, Pages 903-906

  Muhtaroglu, Ali ^a   Provost, Benoit ^a   Rahal Arabi, Tawfik ^a   Taylor, Greg ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CURRENT EXCITATION; DEFECTIVE LEAKAGE; LEAKAGE TESTING; PIN-TO-PIN (P2P) LEAKAGE;

CAPACITANCE; COMPARATOR CIRCUITS; DESIGN FOR TESTABILITY; DIGITAL CIRCUITS; ELECTRIC POTENTIAL; INPUT OUTPUT PROGRAMS; MICROPROCESSOR CHIPS; SILICON;

LEAKAGE CURRENTS;

EID: 18144362146     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. T.R. Arabi et al, "A JTAG based AC leakage self-test", Symposium on VLSI Circuits, pp 205-206, June 2001.
2. S. Sunter et al, "Contactless digital testing of IC pin leakage currents", Proceedings of the International Test Conference, pp. 204-210, Oct. 200.1
3. T. Frodsham et al, "Apparatus for I/O leakage self-test in an integrated circuit", US patent 6262585, July 2001.