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Volumn 22, Issue 2, 2005, Pages 136-148

Scalable processor instruction set extension

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SYSTEMS PROGRAMMING; DATA FLOW ANALYSIS; PIPELINE PROCESSING SYSTEMS; PROGRAM COMPILERS; REDUCED INSTRUCTION SET COMPUTING;

EID: 17844366293     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.2005.43     Document Type: Article
Times cited : (19)

References (12)
  • 2
    • 8744241430 scopus 로고    scopus 로고
    • "The MOLEN Polymorphic Processor"
    • Nov
    • S. Vassiliadis et al., "The MOLEN Polymorphic Processor," IEEE Trans. Computers, vol. 53, no. 11, Nov. 2004, pp. 1363-1375.
    • (2004) IEEE Trans. Computers , vol.53 , Issue.11 , pp. 1363-1375
    • Vassiliadis, S.1
  • 4
    • 0031236158 scopus 로고    scopus 로고
    • "Baring It All to Software: Raw Machines"
    • Sept
    • E. Waingold et al.; "Baring It All to Software: Raw Machines," Computer, vol 30, no. 11, Sept. 1997, pp. 86-93.
    • (1997) Computer , vol.30 , Issue.11 , pp. 86-93
    • Waingold, E.1
  • 5
    • 17844411317 scopus 로고    scopus 로고
    • Xvid MPEG-4 Codec Project
    • Xvid MPEG-4 Codec Project, http://www.xvid.org.
  • 6
    • 17844411031 scopus 로고    scopus 로고
    • "User-Defined Functions in DSP: PowerPlug Modules and the Carmel 20xx"
    • white paper, Infineon Technologies, San Jose, Calif
    • D. Martin, P. Bettler, and J. Geoffrey, "User-Defined Functions in DSP: PowerPlug Modules and the Carmel 20xx," white paper, Infineon Technologies, San Jose, Calif.
    • Martin, D.1    Bettler, P.2    Geoffrey, J.3
  • 7
    • 0036045954 scopus 로고    scopus 로고
    • "PipeRench: A Virtualized Programmable Data Path in 0.18 Micron Technology"
    • (CICC 02), IEEE Press
    • H. Schmit et al., "PipeRench: A Virtualized Programmable Data Path in 0.18 Micron Technology," Proc. 2002 Custom Integrated Circuits Conf. (CICC 02), IEEE Press, 2002, pp. 63-66.
    • (2002) Proc. 2002 Custom Integrated Circuits Conf. , pp. 63-66
    • Schmit, H.1
  • 9
    • 84942036117 scopus 로고    scopus 로고
    • "Architecture, Memory and Interface Technology Integration of an Industrial/Academic Configurable System-on-Chip (CSoC)"
    • (WVLSI 03), IEEE Press
    • J. Becker and M. Vorbach, "Architecture, Memory and Interface Technology Integration of an Industrial/Academic Configurable System-on-Chip (CSoC)," Proc. IEEE Computer Soc. Ann. Workshop VLSI (WVLSI 03), IEEE Press, 2003, pp. 107-112.
    • (2003) Proc. IEEE Computer Soc. Ann. Workshop VLSI , pp. 107-112
    • Becker, J.1    Vorbach, M.2
  • 12
    • 17844391117 scopus 로고    scopus 로고
    • LEON/ERC32 Cross Compilation System (LECCS)
    • LEON/ERC32 Cross Compilation System (LECCS), http://www.gaisler.com.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.