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Volumn , Issue , 2003, Pages 367-370

Highly Manufacturable 40-50 GHz VCOs in a 120nm System-on-Chip SOI Technology

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE MEASUREMENT; COMPUTER SIMULATION; ELECTRIC CONDUCTANCE; ENERGY DISSIPATION; INTEGRATED CIRCUITS; NATURAL FREQUENCIES; SILICON ON INSULATOR TECHNOLOGY; SPURIOUS SIGNAL NOISE; TOPOLOGY; VARACTORS; VOLTAGE MEASUREMENT;

EID: 17644445890     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (6)

References (5)
  • 1
    • 0043162165 scopus 로고    scopus 로고
    • High-performance three dimensional on-chip inductors in SOI CMOS technology for monolithic RF circuit applications
    • June
    • J. Kim, J. Plouchart, N. Zamdmer, N. Fong, L. Lu, Y. Tan, et al., "High-performance three dimensional on-chip inductors in SOI CMOS technology for monolithic RF circuit applications," RFIC Symposium, pp. 591-594, June 2003.
    • (2003) RFIC Symposium , pp. 591-594
    • Kim, J.1    Plouchart, J.2    Zamdmer, N.3    Fong, N.4    Lu, L.5    Tan, Y.6
  • 2
    • 0035714324 scopus 로고    scopus 로고
    • A high performance 0.13μm SOI CMOS technology with a norm silk on film and with a second generation low-K Cu BEOL
    • December
    • J. Sleight, P. Varekamp, N. Lutsig, J. Adkisson, A. Allen, O. Bula, et al., "A high performance 0.13μm SOI CMOS technology with a norm silk on film and with a second generation low-K Cu BEOL," IEDM Technical Digest, pp. 245-248 December 2001.
    • (2001) IEDM Technical Digest , pp. 245-248
    • Sleight, J.1    Varekamp, P.2    Lutsig, N.3    Adkisson, J.4    Allen, A.5    Bula, O.6
  • 4
    • 0035054939 scopus 로고    scopus 로고
    • A 50-GHz VCO in a 0.25μm CMOS
    • February
    • H. Wang, "A 50-GHz VCO in a 0.25μm CMOS", ISSCC Digest of Technical Papers, vol. 44, pp. 372-373 February 2001.
    • (2001) ISSCC Digest of Technical Papers , vol.44 , pp. 372-373
    • Wang, H.1
  • 5
    • 12144287634 scopus 로고    scopus 로고
    • A power-optimized widely-tunable 5-GHz monolithic VCO in a digital SOI CMOS technology on high resistivity substrate
    • August
    • J. Kim, J. Plouchart, N. Zamdmer, M. Sherony, Y. Tan, M. Yoon, et al., "A power-optimized widely-tunable 5-GHz monolithic VCO in a digital SOI CMOS technology on high resistivity substrate," ISLPED, pp. 434-439, August 2003.
    • (2003) ISLPED , pp. 434-439
    • Kim, J.1    Plouchart, J.2    Zamdmer, N.3    Sherony, M.4    Tan, Y.5    Yoon, M.6


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.