Towards reproducible scanning capacitance microscope image interpretation

Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures

Volumn 22, Issue 1, 2004, Pages 399-405

  Kopanski, J J ^a   Marchiando, J F ^a   Rennex, B G ^a   Simons, D ^a   Chau, Q ^b  

^a NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; IMAGE ANALYSIS; METALLIZING; SCANNING; SECONDARY ION MASS SPECTROMETRY; SEMICONDUCTOR DOPING; SENSORS; TRANSISTORS;

DOPANT GRADIENT; SCANNING CAPACITANCE MICROSCOPY (SCM);

CAPACITANCE;

EID: 1642364935     PISSN: 10711023     EISSN: None     Source Type: Journal    
DOI: 10.1116/1.1627794     Document Type: Conference Paper

References (13)

1. The International Technology Roadmap for Semiconductors is sponsored by the Semiconductor Industry Association (SIA), the European Electronic Component Association (EECA), the Japan Electronics & Information Technology Industries Association (JEITA), the Korean Semiconductor Industry Association (KSIA), and Taiwan Semiconductor Industry Association (TSIA). International SEMATECH is the global communication center for this activity.
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3. The NIST FASTC2D software for SCM image interpretation is available from the authors.
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13. Certain commercial equipment, instruments, or materials are identified in this article in order to specify adequately the experimental procedure. Such identification does not imply recommendation or endorsement by NIST, nor does it imply that the materials or equipment used are necessarily the best available for the purpose.