Precision Modeling of Floating-Point Applications for Variable Bitwidth Computing

Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms

Volumn , Issue , 2003, Pages 208-214

  Zhao, Zhihong ^a   Leeser, Miriam ^a  

^a Northeastern University   (United States)

Author keywords

Arithmetic; Fixed point; Floating point; Optimization; Reconfigurable hardware

Indexed keywords

ALGORITHMS; BENCHMARKING; COMPUTER HARDWARE; COMPUTER SIMULATION; ERROR ANALYSIS; MULTIMEDIA SYSTEMS; OPTIMIZATION;

ARITHMETIC; FIXED POINT; FLOATING POINT; RECONFIGURABLE HARDWARE;

COMPUTER SCIENCE;

EID: 1642364277     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. J.Y.F. Tong, D. Nagle, and R. Rutenbar, "Reducing Power by Optimizing the Necessary Precision Range of Floating Point Arithmetic," in IEEE Transactions on VLSI systems, Vol. 8, No.3, pp 273-286, June 2000.
2. M. Stevenson, J. Babb, and S. Armarasmghe, "Bitwidth Analysis with Application to Silicon Compilation," in ACM SIGPLAN Conference on Programming Language Design and Implementation, June 2000, pp. 108-120.
3. A. Gaffar, O. Mensor, W. Luk, P. Cheung, N Shirazi, and N. Shirazi, "Floaint-Point Bitwidth Analyssis via Automatic Differentiation," IEEE International Conference on Field-Programmable Technology, 2002.
4. IEEE Standards Board and ANSI, IEEE Standard for Binary Floating-Point Arithmetic, 1985, IEEE Std 754-1985.
5. th International Conference on Field Programmable Logic and Applications, September 2002.
6. G. Adams, Precision-based Program Optimization, Ph.D Thesis, Department of Electrical and Computer Engineering, Cornell University, 2000.
7. F. Fang, T. Chen and R. A. Rutenbar, "Floating-Point Bit-Width Optimization for Low-Power Signal Processing Applications", ICASSP 2002., May 2002.
8. th International Conference on Field Programmable Logic and Applications, pp 523-533, 2002.