Floating-point bit-width optimization for low-power signal processing applications

ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

Volumn 3, Issue , 2002, Pages

  Fang, Fang ^a   Chen, Tsuhan ^a   Rutenbar, Rob A ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; COMPUTER HARDWARE; COMPUTER SIMULATION; COSINE TRANSFORMS; IMAGE CODING; MOBILE RADIO SYSTEMS; NUMERICAL METHODS; OPTIMIZATION; SEARCH ENGINES; SPEECH RECOGNITION;

BIT-WIDTH OPTIMIZATION ENGINE; FLOATING-POINT SIGNAL PROCESSING; INVERSE DISCRETE COSINE TRANSFORM; VARIABLE GROUPING;

DIGITAL SIGNAL PROCESSING;

EID: 0141708536     PISSN: 15206149     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

1. System level fixed-point design based on an interpolative approach
2. AUTOSCALER for C: An optimizing FP to integer C program converter for fixed-point digital signal processors
3. An automatic word length determination method
4. Fixed-point optimization utility for C and C++ based digital signal processing programs
5. Simulation of variable precision IEEE floating point using C++ and its application in digital signal processor design
6. Creating new algorithm and modifying old algorithms to use the variable precision floating point simulator
7. IEEE-standard specifications for the implementations of 8X8 inverse discrete cosine transform