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Volumn , Issue , 2003, Pages 127-133

Architecture of a Reconfigurable Processor for Implementing Search Algorithms over Discrete Matrices

Author keywords

Boolean and ternary matrices; FPGA; Problems of combinatorial optimization; Reconfigurable architecture; Search algorithm

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; COMPUTER ARCHITECTURE; FIELD PROGRAMMABLE GATE ARRAYS; MATRIX ALGEBRA; OPTIMIZATION;

EID: 1642322114     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (11)

References (15)
  • 5
    • 0034174021 scopus 로고    scopus 로고
    • Reconfigurable accelerators for combinatorial problems
    • Apr.
    • Platzner, M.: Reconfigurable accelerators for combinatorial problems. IEEE Computer, Apr. 2000, pp. 58-60.
    • (2000) IEEE Computer , pp. 58-60
    • Platzner, M.1
  • 6
    • 0034140752 scopus 로고    scopus 로고
    • A SAT solver using reconfigurable hardware and virtual logic
    • February
    • Abramovici, M., de Sousa, J.,T.: A SAT solver using reconfigurable hardware and virtual logic. Journal of Automated Reasoning, vol. 24, nos. 1-2, February 2000, pp. 5-36.
    • (2000) Journal of Automated Reasoning , vol.24 , Issue.1-2 , pp. 5-36
    • Abramovici, M.1    De Sousa, J.T.2
  • 8
    • 0009975792 scopus 로고    scopus 로고
    • Design and Implementation of Reconfigurable Processor for Problems of Combinatorial Computations
    • Warsaw, Sept. 4-6
    • Skliarova, I., Ferrari, A.B.: Design and Implementation of Reconfigurable Processor for Problems of Combinatorial Computations. Proc. of EUROMICRO Symp. on Digital Systems Design, Warsaw, Sept. 4-6, 2001, pp. 112-119.
    • (2001) Proc. of EUROMICRO Symp. on Digital Systems Design , pp. 112-119
    • Skliarova, I.1    Ferrari, A.B.2
  • 9
    • 0010015450 scopus 로고
    • Combinatorial Theory of Logical Design
    • Zakrevskij, A.: Combinatorial Theory of Logical Design. Automatics and Computers. 1990, N 2, pp. 68-79.
    • (1990) Automatics and Computers , Issue.2 , pp. 68-79
    • Zakrevskij, A.1
  • 10
    • 0036684805 scopus 로고    scopus 로고
    • Reconfigurable models of finite state machines and their implementation in FPGAs
    • V.Sklyarov, Reconfigurable models of finite state machines and their implementation in FPGAs. Journal of Systems Architecture, 2002, 47, pp. 1043-1064.
    • (2002) Journal of Systems Architecture , vol.47 , pp. 1043-1064
    • Sklyarov, V.1
  • 12
    • 1642294944 scopus 로고    scopus 로고
    • Design of Digital Circuits on the Basis of Hardware Templates
    • Las Vegas, 23-26 June
    • Sklyarov, V., Skliarova, I. Design of Digital Circuits on the Basis of Hardware Templates. Proceedings of ESA'2003, Las Vegas, 23-26 June, 2003.
    • (2003) Proceedings of ESA'2003
    • Sklyarov, V.1    Skliarova, I.2
  • 13
    • 1642265726 scopus 로고    scopus 로고
    • PCI boards: http://www.alpha-data.com
  • 15
    • 1642273779 scopus 로고    scopus 로고
    • Xilinx FPGA
    • ISE 5.2, Xilinx FPGA. Available: http:/www.xilinx.com/
    • ISE 5.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.