Reconfigurable accelerators for combinatorial problems

Computer

Volumn 33, Issue 4, 2000, Pages 58-60

  Platzner, Marco ^a  

^a ETH ZURICH   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL CIRCUITS; COMPUTATIONAL COMPLEXITY; COMPUTER SYSTEMS PROGRAMMING; RESPONSE TIME (COMPUTER SYSTEMS); SEQUENTIAL MACHINES;

BOOLEAN SATISFIABILITY (SAT); FINITE STATE MACHINES (FSM); RECONFIGURABLE ACCELERATORS;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0034174021     PISSN: 00189162     EISSN: None     Source Type: Trade Journal    
DOI: 10.1109/2.839322     Document Type: Article

References (2)

1. M. Platzner and G. De Micheli, "Acceleration of Satisfiability Algorithms by Reconfigurable Hardware," Int'l Workshop Field-Programmable Logic and Applications, Springer-Verlag, Berlin, 1998, pp. 69-78.
2. O. Mencer and M. Platzner, "Dynamic Circuit Generation for Boolean Satisfiability in an Object-Oriented Design Environment," 32th Hawaiian Int'l Conf. System Sciences, IEEE CS Press, Los Alamitos, Calif., 1999.