SimplePipe: A simulation tool for task allocation and design of processor pipelines with application to network processors

Proceedings - IEEE Computer Society's Annual International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunications Systems, MASCOTS

Volumn , Issue , 2004, Pages 59-66

  Franklin, Mark A ^a   Joshi, Vinayak ^a  

^a WASHINGTON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP SIZES; NETWORK PROCESSORS; PROCESSOR PIPELINES; TASK ALLOCATION;

C (PROGRAMMING LANGUAGE); COMPUTER ARCHITECTURE; COMPUTER NETWORKS; COMPUTER SIMULATION; DATA STORAGE EQUIPMENT; INTERCONNECTION NETWORKS; MATHEMATICAL MODELS;

PROGRAM PROCESSORS;

EID: 16244423695     PISSN: 15267539     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1017/CBO9780511616884.006     Document Type: Conference Paper

References (11)

1. T. Austin, E. Larson, and D. Ernst, "SimpleScalar: An Infrastructure for Computer System Modelling," in IEEE Computer, Feb 2002.
2. "SimpleScalar Documentation Website." http://www.simplescalar.com.
3. P. Crowley, M. Franklin, H. Hadimioglu, and P. Onufryk, Network Processor Design: Issues and Practices - Vol I. Morgan Kaufmann Pub., 2003.
4. IBM Corp., "IBM Power Network Processors." http://www.chips.ibm.com/products/wired/communications/ network.processors.html, 2000.
5. Intel Corp., "Intel IXP 2800 Network Processor." http://developer.intel.com/design/network/products/npfamily/ ixp2800.htm, 2000.
6. M. Franklin and T.Wolf., "A Network Processor Performance and Design Model with Benchmark Parameterization.," in Network Processor Design: Issues and Practices, Vol 1., eh. 6, Morgan Kaufmann Pub., Feb 2002.
7. M. Franklin and T. Wolf., "Power Considerations in Network Processor Design," in Network Processor Design: Issues and Practices, Vol 2., ch. 3, Morgan Kaufmann Pub., Dec 2003.
8. T. Wolf and M. Franklin., "Design tradeoffs for embedded network processors.," in Proc. of Intl. Conf. Architecture of Computing Systems (ARCS) (Lecture Notes in Computer Science), Karlsruhe, Germany, Springer Verlag., vol. 2299, pp. 149-164, Apr 2002.
9. T. Wolf and M. Franklin., "Commbench - a telecommunications benchmark for network processors.," in Proc. of IEEE Inter. Symp. on Performance Analysis of Systems and Software (ISPASS), Austin, TX., pp. 154-162, Apr 2000.
10. M. Franklin and S. Datar, "Pipeline Task Scheduling on Network Processors," in Proc. of 3rd Workshop on Network Processors, Feb 2004.
11. S. Datar, "Pipeline Task Scheduling with Application to Network Processors," Master's thesis, Dept of Computer Science and Engineering. Washington University in St Louis, Jul 2004.