Energy-delay optimization of thin-body MOSFETs for the sub-15 nm regime

Proceedings - IEEE International SOI Conference

Volumn , Issue , 2004, Pages 27-29

  Balasubramanian, Sriram ^a   Garrett, Joshua L ^a   Vidya, Varadarajan ^a   Nikolić, Borivoje ^a   King, Tsu Jae ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE CONTROL SYSTEMS; COMPUTER SIMULATION; FIELD EFFECT TRANSISTORS; LEAKAGE CURRENTS; OPTIMIZATION; THRESHOLD VOLTAGE;

CHANNEL DOPING VALUE; ENERGY-DELAY OPTIMIZATION; THRESHOLD-VOLTAGE BIASING; TRANSISTOR DESIGN OPTIMIZATATION;

MOSFET DEVICES;

EID: 16244419350     PISSN: 1078621X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. J.W. Tschanz et al., IEEE JSSCC, p.1838, 2003
2. A. Khakifirooz et al., IEEE SOI Conf., p.58, 2002
3. Taurus 2002.4 User's Manual, Synopsys Inc., 2002
4. D. Frank et al., IEEE EDL, Vol. 19, p.385, 1998
5. S. Balasubramanian et al., SiNano. Workshop, 2002