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Volumn , Issue , 2004, Pages 626-631

A novel clock distribution and dynamic de-skewing methodology

Author keywords

[No Author keywords available]

Indexed keywords

BUFFERS; CLOCK DISTRIBUTION; CLOCK SKEW; DE-SKEWING;

EID: 16244417469     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (44)

References (13)
  • 8
    • 0022953369 scopus 로고
    • A symmetric clock distribution tree and optimized high speed interconnections for reduced clock skew in ulsi and wsi circuits
    • Oct
    • H. B. et al, "A symmetric clock distribution tree and optimized high speed interconnections for reduced clock skew in ulsi and wsi circuits," in IEEE Int'l Conf. Computer Design, pp. 118-122, Oct 1986.
    • (1986) IEEE Int'l Conf. Computer Design , pp. 118-122
    • B., H.1
  • 9
  • 12
    • 84950134284 scopus 로고    scopus 로고
    • Analysis and avoidance of cross-talk in on-chip buses
    • (Stanford, CA), Aug
    • C. Duan, A. Tirumala, and S. Khatri, "Analysis and avoidance of cross-talk in on-chip buses," in Hot Interconnects 9, (Stanford, CA), pp. 133-138, Aug 2001.
    • (2001) Hot Interconnects , vol.9 , pp. 133-138
    • Duan, C.1    Tirumala, A.2    Khatri, S.3
  • 13
    • 84888920622 scopus 로고    scopus 로고
    • "BSIM3 Homepage." http://www-device.eecs.berkeley.edu/~bsim3/ intro.html.
    • BSIM3 Homepage


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.