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Volumn , Issue , 2004, Pages 188-193

Optimizing the memory bandwidth with loop fusion

Author keywords

Loop fusion; Low power; Memory bandwidth

Indexed keywords

LOOP FUSION; LOW POWER; MEMORY BANDWIDTH; TRADE-OFFS;

EID: 16244389344     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (23)

References (17)
  • 1
    • 16244363276 scopus 로고    scopus 로고
    • Heterogeneous memory management for embedded systems
    • O. Avissar, R. Barua, and D. Stewart. Heterogeneous Memory Management for Embedded Systems. In Proc. Cases, 2001.
    • (2001) Proc. Cases
    • Avissar, O.1    Barua, R.2    Stewart, D.3
  • 3
    • 0001366267 scopus 로고
    • Strategies for cache and local memory management by global progra, optimizations
    • D. Cannon and W. Jalby abd K. Gallivan. Strategies for cache and local memory management by global progra, optimizations. J. of Parallel and Distributed Systems, 25:587-617, 1988.
    • (1988) J. of Parallel and Distributed Systems , vol.25 , pp. 587-617
    • Cannon, D.1    Jalby, W.2    Gallivan, K.3
  • 4
    • 0033701581 scopus 로고    scopus 로고
    • Memory aware compilation through timing extraction
    • Jun.
    • P. Grun, N. Dutt, and A. Nicolau. Memory Aware Compilation through Timing Extraction. In Proc. 37th Dac, pages 316-321, Jun. 2001.
    • (2001) Proc. 37th Dac , pp. 316-321
    • Grun, P.1    Dutt, N.2    Nicolau, A.3
  • 6
    • 0016026944 scopus 로고
    • The parallel execution of do-loops
    • Feb.
    • L. Lamport. The parallel execution of do-loops. Communications of ACM, 17(2):83-93, Feb. 1974.
    • (1974) Communications of ACM , vol.17 , Issue.2 , pp. 83-93
    • Lamport, L.1
  • 8
    • 0003553286 scopus 로고
    • Improving locality and parallelism in nested loops
    • Technical report, Stanford Univ., CA, USA, Sep.
    • M. Wolf. Improving locality and parallelism in nested loops. Technical report, Technical report CSL-TR-92-538, Stanford Univ., CA, USA, Sep. 1992.
    • (1992) Technical Report , vol.CSL-TR-92-538
    • Wolf, M.1
  • 9
    • 0031354142 scopus 로고    scopus 로고
    • Exploiting off-chip memory access modes in high-level Synthesis
    • Oct.
    • P. Panda, N. Dutt, and A. Nicolau. Exploiting Off-Chip Memory Access Modes in High-Level Synthesis. In Proc. Iccad, pages 333-340, Oct. 1997.
    • (1997) Proc. Iccad , pp. 333-340
    • Panda, P.1    Dutt, N.2    Nicolau, A.3
  • 12
    • 0009755242 scopus 로고
    • Iterative modulo scheduling
    • HP Labs
    • B. Rau. Iterative Modulo Scheduling. Technical report, HP Labs, 1995.
    • (1995) Technical Report
    • Rau, B.1
  • 13
    • 29244465941 scopus 로고    scopus 로고
    • Exploiting dual data banks in digital signal processors
    • Jun.
    • M. Saghir, P. Chow, and C. Lee. Exploiting Dual Data Banks in Digital Signal Processors. In ASPLOS, Jun. 1997.
    • (1997) ASPLOS
    • Saghir, M.1    Chow, P.2    Lee, C.3
  • 17
    • 0033279857 scopus 로고    scopus 로고
    • Minimizing the required memory bandwidth in VLSI system realizations
    • Dec.
    • S. Wuytack, F. Catthoor, G. De Jong, and H. De Man. Minimizing the required memory bandwidth in VLSI system realizations. IEEE Trans. VLSI Systems, 7(4):433-441, Dec. 1999.
    • (1999) IEEE Trans. VLSI Systems , vol.7 , Issue.4 , pp. 433-441
    • Wuytack, S.1    Catthoor, F.2    De Jong, G.3    De Man, H.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.